Digital-to-Analog Conversion (DAC) is an important part of signal processing especially since there are more and more engineers/designers choosing to operate on a signal in the digital domain rather than in the analog domain, as low cost, high performance digital signal processors are becoming widely available. This trend is especially prevalent among multimedia engineers/designers who are in the music and video industries, because of the advent of dense compression, 3D images, and panoramic displays, etc. . . . However, no matter how much a multimedia engineer/designer digitally processes a multimedia signal, the human sensory perception of the processed multimedia signal is still based on simple low frequency, analog mechanisms. Thus, the DAC itself becomes an important, and often limiting, factor in the field of multimedia signal processing. The two most common types of DACs used today include a multi-bit DAC and a bitstream DAC each of which have unique advantages and distinct drawbacks when performing a digital-to-analog conversion. A discussion about these DACs and their associated advantages and drawbacks are provided below with respect to FIGS. 1-2 (PRIOR ART).
FIG. 1A (PRIOR ART) is a block diagram of an exemplary multi-bit DAC 100a which uses a voltage summing amplifier 102a to convert a 4-bit unsigned multimedia signal 104a into an analog multimedia signal 106a. The voltage summing amplifier 102a includes a network of resistors R, 2R, 4R, 8R, Rs, Rg and RLoad and an op-amplifier 108a (a detailed discussion about this particular configuration is not provided herein since it is well known to those skilled in the industry). If one observes the relationship between the values of the summing resistors R, 2R, 4R, 8R and the 4-bit multimedia signal 104a, then one can see how there would be a problem if a 16-bit multimedia signal 104a (for example) needed to be converted into an analog multimedia signal 106a since the ratio between the largest resistance and the smallest resistance would be as large as 65,536. Thus, this particular multi-bit DAC 100a suffers from manufacturing issues which are caused by the difficulty in manufacturing the various resistors needed to handle a large multimedia signal 104a. Today, this is especially true since many audio/video standards require 24+bit resolution which means that the multi-bit DAC 100a would need to have a very wide range of resistors to handle the dynamic range of a 24+bit multimedia signal 104a. 
FIG. 1B (PRIOR ART) is a block diagram of an alternative multi-bit DAC 100b which has been developed to address the aforementioned resistance ratio problem. In this example, the multi-bit DAC 100b utilizes a voltage summing amplifier 102b to convert a 4-bit unsigned multimedia signal 104b into an analog multimedia signal 106b. The voltage summing amplifier 102b includes multiple R-2R networks (four shown), logic switches 103b (four shown), resistors Rs, Rg and RLoad and an op-amplifier 108b. This arrangement uses a small logic switch 103b at each bit input to avoid the extreme high-to-low resistor ratio which is the main problem with the previous multi-bit DAC 100a. Each logic switch 103b is configured to output Vref if the corresponding bit is 1 and to shut-off when the corresponding bit is 0. In this way, the multi-bit DAC 100b can use the R-2R combination repeatedly throughout the whole implementation and still produce a suitable analog multimedia signal 106b. A detailed discussion about the configuration of the multi-bit DAC 100b is not provided herein because this particular configuration is well known to those skilled in the industry.
An alternative and increasingly popular approach for performing a digital-to-analog conversion is to use the bitstream DAC 200a. FIG. 2A (PRIOR ART) is a block diagram of an exemplary bitstream DAC 200a which includes a digital modulator 202a, a clock 204a, a digital low pass filter (LPF) 206a, an analog DAC 208a and an analog LPF 210a. The digital modulator 202a (with the aid of the clock 204a) transcodes the digital bits of a multimedia signal 212a into a pulse train 205a (or series of pulses 205a). The digital LPF 206a filters the pulse train 205a and the analog DAC 208 (typically 1-bit analog DAC 208) converts the filtered pulse train 207a into an analog signal 209a. Thereafter, the analog LPF 210a filters the analog signal 209a and outputs a filtered analog signal 214a. 
The digital modulator 202a uses a modulation scheme to produce a suitable pulse train 205a from the digital multimedia signal 212a. The most prevalent modulation scheme which is used today is known as sigma delta modulation. FIG. 2B (PRIOR ART) illustrates a digital modulator 202a which implements a 2nd order sigma delta modulation scheme. As shown, this particular digital modulator 202a includes two summers 220a, two integrators 222a, a comparator 224a and a latch 226a. If desired, the digital modulator 202a could incorporate a higher order sigma delta digital modulator which would be built on multiple cascading/recursive low order sigma delta modulators. A detailed discussion about the 2nd order sigma delta modulator 202a and higher order sigma delta modulators 202a is not provided herein because these configurations are well known to those skilled in the industry.
Referring again to FIG. 2A (PRIOR ART), the digital modulator 202a (or the sigma delta digital modulator 202a) outputs a pulse train 205a that is filtered/processed by the digital LPF 206a, the analog DAC 208a and the analog LPF 210a to generate the resulting analog signal 214a. However, it can be difficult to separate the desired frequency band from the neighboring frequency band in the multimedia signal by using simple LPFs 206a and 210a. As a result, a portion of the undesired neighboring frequency band is often mixed in with the resulting analog signal 214a. This effect is called aliasing. One way to deal with aliasing is to use oversampling. The artificially high sampling rate associated with oversampling creates a substantial separation between the desired frequency band and the undesired neighboring frequency band. An exemplary over-sampled bitstream DAC 200b which is commonly used today is discussed next with respect to FIG. 2C (PRIOR ART).
FIG. 2C (PRIOR ART) illustrates an exemplary over-sampled bitstream DAC 200b which includes an interpolation filter 228b, a bitstream DAC 200a and a synthesis filter 238b. The interpolation filter 228b upsamples the bitstream of the multimedia signal 212a. The clock 204a (which is associated with the bitstream DAC 200a) enables multimedia signal 212a to be upsampled by operating at a fast rate: N (oversampling rate)*F (normal rate). The bitstream DAC 200a converts the upsampled digital multimedia signal 240b into an upsampled analog multimedia signal 242b. The synthesis filter 238b (which is the reverse shape of the interpolation filter 228b) downsamples the upsampled analog multimedia signal 242b and outputs an analog multimedia signal 214b. A detailed discussion about the over-sampled bitstream DAC 200b is not provided herein because this type of device is well known to those skilled in the industry.
A main problem associated with the over-sampled bitstream DAC 200b (and the regular bitstream DAC 200a) is that it is prone to limit cycle oscillations (especially those that employ a low order delta sigma modulator 202a). These limit cycle distortions are caused by the feedback and non-linearity of the sigma delta digital modulator 202a. And, they exhibit themselves as a periodic tone which is superimposed on the resulting analog signal 214b. This is not desirable. Plus, if the over-sampled bitstream DAC 200b happens to incorporate a higher order delta sigma modulator 202a then it could be difficult to stabilize which makes it difficult to achieve the desired signal-to-noise ratio (SNR).
Moreover, the over-sampled bitstream DAC 200b functions under the assumption that undesired noises, distortions, and other artifacts are randomly distributed across the entire dynamic range and across the entire frequency span of the multimedia signal. This is not desirable when processing a multimedia signal. Because, when the noise profile is highly focused on a particular dynamic range and frequency band, then oversampling can make things much worse by smearing it across the entire usable dynamic range and frequency band of the multimedia signal. This smearing effect often displays itself as jitter. One way to address this smearing effect is to utilize noise shaping which is a technique where random noise is added to the multimedia signal in an attempt to balance out the noise spectrum. However, the addition of noise to a pristine multimedia signal usually produces undesirable effects such as a lower SNR.
From the foregoing, it can be seen that the multi-bit DACs 100a and 100b and the bitstream DACs 200a and 200b each have problems which can adversely affect the quality of the conversion of a digital multimedia signal 104a and 212a into an analog multimedia signal 106a, 106b, 214a and 214b. And, these problems can lead to a decrease in the human perceptual quality of the resulting analog multimedia signal 106a, 106b, 214a and 214b. Thus, there is a need for a device that performs a digital-to-analog conversion on a multimedia signal in a manner which enhances the human perceptual quality of the resulting analog multimedia signal. This need and other needs are solved by the present invention.